Minimum supported cluster configuration
Clusters managed by Anthos clusters on AWS must meet the following minimum requirements. Your clusters might need more powerful control plane and node pool instances depending on the demands of your workloads.
| Cluster size (nodes) | Control plane instances | Node pool instances |
|---|---|---|
| Demo | 3 x t3.medium | 2 x t3.medium |
| 1-10 nodes | 3 x m5.large | workload dependent |
| 11-100 nodes | 3 x m5.xlarge | workload dependent |
| 101-200 nodes | 3 x m5.2xlarge | workload dependent |
Supported AWS instance types
Anthos clusters on AWS supports x86 instance types for control planes. For node pools, Anthos clusters on AWS supports both x86 and Arm instance types. For more information, see Instance types in the AWS documentation.
All instances that have Arm architecture are in Preview. To learn how to use these instance types, see Run Arm workloads in Anthos clusters on AWS.
| Instance type | Model | Architecture |
|---|---|---|
| C5 Instances | c5.12xlarge | X86_64 |
| C5 Instances | c5.18xlarge | X86_64 |
| C5 Instances | c5.24xlarge | X86_64 |
| C5 Instances | c5.2xlarge | X86_64 |
| C5 Instances | c5.4xlarge | X86_64 |
| C5 Instances | c5.9xlarge | X86_64 |
| C5 Instances | c5.large | X86_64 |
| C5 Instances | c5.xlarge | X86_64 |
| C5 Instances | c5a.12xlarge | X86_64 |
| C5 Instances | c5a.16xlarge | X86_64 |
| C5 Instances | c5a.24xlarge | X86_64 |
| C5 Instances | c5a.2xlarge | X86_64 |
| C5 Instances | c5a.4xlarge | X86_64 |
| C5 Instances | c5a.8xlarge | X86_64 |
| C5 Instances | c5a.large | X86_64 |
| C5 Instances | c5a.xlarge | X86_64 |
| C5 Instances | c5ad.12xlarge | X86_64 |
| C5 Instances | c5ad.16xlarge | X86_64 |
| C5 Instances | c5ad.24xlarge | X86_64 |
| C5 Instances | c5ad.2xlarge | X86_64 |
| C5 Instances | c5ad.4xlarge | X86_64 |
| C5 Instances | c5ad.8xlarge | X86_64 |
| C5 Instances | c5ad.large | X86_64 |
| C5 Instances | c5ad.xlarge | X86_64 |
| C5 Instances | c5d.12xlarge | X86_64 |
| C5 Instances | c5d.18xlarge | X86_64 |
| C5 Instances | c5d.24xlarge | X86_64 |
| C5 Instances | c5d.2xlarge | X86_64 |
| C5 Instances | c5d.4xlarge | X86_64 |
| C5 Instances | c5d.9xlarge | X86_64 |
| C5 Instances | c5d.large | X86_64 |
| C5 Instances | c5d.xlarge | X86_64 |
| C6g Instances | c6g.12xlarge | ARM64 |
| C6g Instances | c6g.16xlarge | ARM64 |
| C6g Instances | c6g.2xlarge | ARM64 |
| C6g Instances | c6g.4xlarge | ARM64 |
| C6g Instances | c6g.8xlarge | ARM64 |
| C6g Instances | c6g.large | ARM64 |
| C6g Instances | c6g.medium | ARM64 |
| C6g Instances | c6g.xlarge | ARM64 |
| C6g Instances | c6gd.12xlarge | ARM64 |
| C6g Instances | c6gd.16xlarge | ARM64 |
| C6g Instances | c6gd.2xlarge | ARM64 |
| C6g Instances | c6gd.4xlarge | ARM64 |
| C6g Instances | c6gd.8xlarge | ARM64 |
| C6g Instances | c6gd.large | ARM64 |
| C6g Instances | c6gd.medium | ARM64 |
| C6g Instances | c6gd.xlarge | ARM64 |
| C6g Instances | c6gn.12xlarge | ARM64 |
| C6g Instances | c6gn.16xlarge | ARM64 |
| C6g Instances | c6gn.2xlarge | ARM64 |
| C6g Instances | c6gn.4xlarge | ARM64 |
| C6g Instances | c6gn.8xlarge | ARM64 |
| C6g Instances | c6gn.large | ARM64 |
| C6g Instances | c6gn.medium | ARM64 |
| C6g Instances | c6gn.xlarge | ARM64 |
| C7g Instances | c7g.12xlarge | ARM64 |
| C7g Instances | c7g.16xlarge | ARM64 |
| C7g Instances | c7g.2xlarge | ARM64 |
| C7g Instances | c7g.4xlarge | ARM64 |
| C7g Instances | c7g.8xlarge | ARM64 |
| C7g Instances | c7g.large | ARM64 |
| C7g Instances | c7g.medium | ARM64 |
| C7g Instances | c7g.xlarge | ARM64 |
| G5g Instances | g5g.16xlarge | ARM64 |
| G5g Instances | g5g.2xlarge | ARM64 |
| G5g Instances | g5g.4xlarge | ARM64 |
| G5g Instances | g5g.8xlarge | ARM64 |
| G5g Instances | g5g.xlarge | ARM64 |
| I3en Instances | i3en.12xlarge | X86_64 |
| I3en Instances | i3en.24xlarge | X86_64 |
| I3en Instances | i3en.2xlarge | X86_64 |
| I3en Instances | i3en.3xlarge | X86_64 |
| I3en Instances | i3en.6xlarge | X86_64 |
| I3en Instances | i3en.large | X86_64 |
| I3en Instances | i3en.xlarge | X86_64 |
| I4g Instances | im4gn.16xlarge | ARM64 |
| I4g Instances | im4gn.2xlarge | ARM64 |
| I4g Instances | im4gn.4xlarge | ARM64 |
| I4g Instances | im4gn.8xlarge | ARM64 |
| I4g Instances | im4gn.large | ARM64 |
| I4g Instances | im4gn.xlarge | ARM64 |
| I4g Instances | is4gen.2xlarge | ARM64 |
| I4g Instances | is4gen.4xlarge | ARM64 |
| I4g Instances | is4gen.8xlarge | ARM64 |
| I4g Instances | is4gen.large | ARM64 |
| I4g Instances | is4gen.medium | ARM64 |
| I4g Instances | is4gen.xlarge | ARM64 |
| M5 Instances | m5.12xlarge | X86_64 |
| M5 Instances | m5.16xlarge | X86_64 |
| M5 Instances | m5.24xlarge | X86_64 |
| M5 Instances | m5.2xlarge | X86_64 |
| M5 Instances | m5.4xlarge | X86_64 |
| M5 Instances | m5.8xlarge | X86_64 |
| M5 Instances | m5.large | X86_64 |
| M5 Instances | m5.xlarge | X86_64 |
| M5 Instances | m5a.12xlarge | X86_64 |
| M5 Instances | m5a.16xlarge | X86_64 |
| M5 Instances | m5a.24xlarge | X86_64 |
| M5 Instances | m5a.2xlarge | X86_64 |
| M5 Instances | m5a.4xlarge | X86_64 |
| M5 Instances | m5a.8xlarge | X86_64 |
| M5 Instances | m5a.large | X86_64 |
| M5 Instances | m5a.xlarge | X86_64 |
| M5 Instances | m5ad.12xlarge | X86_64 |
| M5 Instances | m5ad.16xlarge | X86_64 |
| M5 Instances | m5ad.24xlarge | X86_64 |
| M5 Instances | m5ad.2xlarge | X86_64 |
| M5 Instances | m5ad.4xlarge | X86_64 |
| M5 Instances | m5ad.8xlarge | X86_64 |
| M5 Instances | m5ad.large | X86_64 |
| M5 Instances | m5ad.xlarge | X86_64 |
| M5 Instances | m5d.12xlarge | X86_64 |
| M5 Instances | m5d.16xlarge | X86_64 |
| M5 Instances | m5d.24xlarge | X86_64 |
| M5 Instances | m5d.2xlarge | X86_64 |
| M5 Instances | m5d.4xlarge | X86_64 |
| M5 Instances | m5d.8xlarge | X86_64 |
| M5 Instances | m5d.large | X86_64 |
| M5 Instances | m5d.xlarge | X86_64 |
| M6 Instances | m6g.12xlarge | ARM64 |
| M6 Instances | m6g.16xlarge | ARM64 |
| M6 Instances | m6g.2xlarge | ARM64 |
| M6 Instances | m6g.4xlarge | ARM64 |
| M6 Instances | m6g.8xlarge | ARM64 |
| M6 Instances | m6g.large | ARM64 |
| M6 Instances | m6g.medium | ARM64 |
| M6 Instances | m6g.xlarge | ARM64 |
| M6 Instances | m6gd.12xlarge | ARM64 |
| M6 Instances | m6gd.16xlarge | ARM64 |
| M6 Instances | m6gd.2xlarge | ARM64 |
| M6 Instances | m6gd.4xlarge | ARM64 |
| M6 Instances | m6gd.8xlarge | ARM64 |
| M6 Instances | m6gd.large | ARM64 |
| M6 Instances | m6gd.medium | ARM64 |
| M6 Instances | m6gd.xlarge | ARM64 |
| R5 Instances | r5.12xlarge | X86_64 |
| R5 Instances | r5.16xlarge | X86_64 |
| R5 Instances | r5.24xlarge | X86_64 |
| R5 Instances | r5.2xlarge | X86_64 |
| R5 Instances | r5.4xlarge | X86_64 |
| R5 Instances | r5.8xlarge | X86_64 |
| R5 Instances | r5.large | X86_64 |
| R5 Instances | r5.xlarge | X86_64 |
| R5 Instances | r5a.12xlarge | X86_64 |
| R5 Instances | r5a.16xlarge | X86_64 |
| R5 Instances | r5a.24xlarge | X86_64 |
| R5 Instances | r5a.2xlarge | X86_64 |
| R5 Instances | r5a.4xlarge | X86_64 |
| R5 Instances | r5a.8xlarge | X86_64 |
| R5 Instances | r5a.large | X86_64 |
| R5 Instances | r5a.xlarge | X86_64 |
| R5 Instances | r5ad.12xlarge | X86_64 |
| R5 Instances | r5ad.16xlarge | X86_64 |
| R5 Instances | r5ad.24xlarge | X86_64 |
| R5 Instances | r5ad.2xlarge | X86_64 |
| R5 Instances | r5ad.4xlarge | X86_64 |
| R5 Instances | r5ad.8xlarge | X86_64 |
| R5 Instances | r5ad.large | X86_64 |
| R5 Instances | r5ad.xlarge | X86_64 |
| R5 Instances | r5d.12xlarge | X86_64 |
| R5 Instances | r5d.16xlarge | X86_64 |
| R5 Instances | r5d.24xlarge | X86_64 |
| R5 Instances | r5d.2xlarge | X86_64 |
| R5 Instances | r5d.4xlarge | X86_64 |
| R5 Instances | r5d.8xlarge | X86_64 |
| R5 Instances | r5d.large | X86_64 |
| R5 Instances | r5d.xlarge | X86_64 |
| R6g Instances | r6g.12xlarge | ARM64 |
| R6g Instances | r6g.16xlarge | ARM64 |
| R6g Instances | r6g.2xlarge | ARM64 |
| R6g Instances | r6g.4xlarge | ARM64 |
| R6g Instances | r6g.8xlarge | ARM64 |
| R6g Instances | r6g.large | ARM64 |
| R6g Instances | r6g.medium | ARM64 |
| R6g Instances | r6g.xlarge | ARM64 |
| R6g Instances | r6gd.12xlarge | ARM64 |
| R6g Instances | r6gd.16xlarge | ARM64 |
| R6g Instances | r6gd.2xlarge | ARM64 |
| R6g Instances | r6gd.4xlarge | ARM64 |
| R6g Instances | r6gd.8xlarge | ARM64 |
| R6g Instances | r6gd.large | ARM64 |
| R6g Instances | r6gd.medium | ARM64 |
| R6g Instances | r6gd.xlarge | ARM64 |
| T3 Instances | t3.2xlarge | X86_64 |
| T3 Instances | t3.large | X86_64 |
| T3 Instances | t3.medium | X86_64 |
| T3 Instances | t3.xlarge | X86_64 |
| T3 Instances | t3a.2xlarge | X86_64 |
| T3 Instances | t3a.large | X86_64 |
| T3 Instances | t3a.medium | X86_64 |
| T3 Instances | t3a.xlarge | X86_64 |
| T4g Instances | t4g.2xlarge | ARM64 |
| T4g Instances | t4g.large | ARM64 |
| T4g Instances | t4g.medium | ARM64 |
| T4g Instances | t4g.xlarge | ARM64 |
| X2g Instances | x2gd.12xlarge | ARM64 |
| X2g Instances | x2gd.16xlarge | ARM64 |
| X2g Instances | x2gd.2xlarge | ARM64 |
| X2g Instances | x2gd.4xlarge | ARM64 |
| X2g Instances | x2gd.8xlarge | ARM64 |
| X2g Instances | x2gd.large | ARM64 |
| X2g Instances | x2gd.medium | ARM64 |
| X2g Instances | x2gd.xlarge | ARM64 |